Why look beyond the transistor
For about thirty years, every new chip generation got faster and more efficient almost for free. Transistors shrank, and each smaller one switched with less energy. That second part, known as Dennard scaling, stopped holding in the mid 2000s. Transistors still shrink, but power density no longer falls with them, which is why clock speeds have been roughly flat for two decades.
Modern AI makes the problem sharper. Most of the work in a neural network is multiply and accumulate, repeated billions of times, and much of the energy goes into moving numbers between memory and arithmetic units rather than into the arithmetic itself. A digital chip spends a lot of effort pretending to be a very fast abacus.
What analog compute means
Analog compute lets physics do the arithmetic. Instead of representing a number as a string of bits and pushing it through logic gates, you represent it as a physical quantity and let a physical law combine it.
| Approach | The physical quantity | What the physics computes |
|---|---|---|
| In-memory compute | Current through resistive cells | Kirchhoff’s law sums currents, which is an accumulate |
| Photonic compute | Amplitude and phase of light | Interference combines waves, which is a linear operation |
| Neuromorphic | Timing of voltage spikes | Neurons integrate spikes over time |
The trade is always the same. You gain energy efficiency and parallelism. You give up precision, and you pick up noise. Most of this site is about measuring that trade honestly.
How a photonic chip computes
A photonic processor encodes numbers into light, usually by modulating the phase or amplitude of a laser beam with an electro-optic material. Waveguides route the light, interferometers combine it, and photodetectors turn the result back into an electrical signal at the end.
The appeal is energy. One vendor, Q.ANT, states 76 fJ per 8-bit operation on its thin-film lithium niobate platform, against roughly 2,300 fJ for CMOS. That is the vendor’s own figure, and I quote it as such.
Evaluating a cosine in the optical domain
Here is the part that makes photonics more than a faster matrix multiplier. Send light through a Mach-Zehnder interferometer, split it into two arms, shift the phase of one arm, and recombine. The output follows a periodic, cosine-like curve of that phase difference. The chip gets that shape almost for free from the physics, though not as a mathematically exact cosine. Q.ANT’s toolkit calls it tcos, the cosine-related shape of the optical nonlinearity, and its CPU simulator substitutes an exact cosine. That difference is one more reason the Lab labels every number with what produced it.
So a natural question is which neural network would want cosines as its building block. One answer is a Kolmogorov-Arnold Network.
Kolmogorov-Arnold Networks in one paragraph
A standard network puts a fixed activation, like ReLU, on each node and learns the weights on the edges. A Kolmogorov-Arnold Network flips that. Each edge carries its own learnable one-dimensional function, and nodes just add. The original paper builds those functions from B-splines. Replace the splines with a short Fourier series and every edge becomes a sum of cosines:
f(x) = bias + Σ a_oik · cos(k · x_i + φ_oik) k = 1 … gridThe amplitudes a and phases φ are learned. The frequencies k are fixed integers. A layer with in inputs, out outputs and a given grid has in × out × grid × 2 + out parameters.
The benchmark used throughout this site is a chirp on [-2, 2], a wave that speeds up toward the edges:
g(x) = sin(2πx) + cos(πx²) + cos(πx³) · sin(πx³)Its local frequency is 1 cycle per unit at the centre and 12 at the edges. Drag the grid below and watch how many cosines a single edge needs before it can follow the fast parts.
The number format is part of the hardware
Analog devices do not take float32. Data typically crosses into the device in a reduced format, and in the hardware studied here that format is bfloat16: 1 sign bit, 8 exponent bits, 7 mantissa bits.
bfloat16 keeps float32's 8 exponent bits, so the range is the same, but only 7 mantissa bits, so roughly three significant digits survive. Every tick on the line is a value it can store. Anything between two ticks snaps to the nearer one.
That rounding happens on every input, every weight and every output. In the Lab you will see what it costs in practice: the best model in the measured runs reaches an MSE of 0.0000200 in float32 and 0.00128 once the same weights pass through bfloat16 in the Q.ANT toolkit emulator. That is 64x worse, and more training does not close it.
The device only runs forward
One more architectural fact shapes everything that follows. In version 2.3.1 of the Q.ANT toolkit, 15 functions end in _fprop, the forward pass, and none contain bprop, backward or grad. There is no backward pass on the device.
So the workflow is: train on the host in float32, then run inference on the photonic device. The Walkthrough goes through that code line by line, and the Playground lets you design a network and run it yourself.